An improved SRAM cell design for tolerating radiation-induced single-event effects

This paper presents an improved design of a radiationhardened static random access memory (SRAM) cell. The memory cell is designed to be tolerant to transient single-event upsets by taking advantage of the fact that for the same area, the surface mobility of NMOS transistors is greater than that of PMOS transistors. The results show that the proposed design is able to withstand single-event upsets for temperatures between −55◦C to 125◦C when subjected to radiation intensities of 1014 rad(Si)/sec without affecting the write performance of the memory. The circuit is also robust when impinging high energy particle strikes at various angles of incidence.